In a reported campus drive, Analog Devices India hired ECE and EE students as interns who could convert to full-time offers: a CGPA shortlist, a two-hour written test with about 10 technical questions and 4 puzzles, then two back-to-back technical interviews on digital design, FSMs, timing and circuits.
Who can apply
- ECE and EE students (branches allowed in one reported campus drive)
- Reported CGPA cutoff of 8.0, later lowered to 7.0, in that drive
Key facts
What Analog Devices India asks — practise by section
Biggest topics to practise
Electronics & Comm. engineering: interview questions · core companies that hire · jobs through GATE
Interview process
- 1CGPA shortlistBranch and CGPA filter through the placement cell; one drive reported a cutoff of 8, later lowered to 7.
- 2Written test2 hours, pen and paper: about 10 technical questions (circuits, FSM, Verilog, static timing, DSP) and 4 puzzles of rising difficulty.
- 3Technical interviewsTwo back-to-back technical interviews over video, about 1.5 hours in total: FIFO numericals, comparators, FSMs, Gray counters and puzzles.
Questions to expect in Analog Devices India interviews
Drawn from reported fresher tests and interviews (sources below), with short answers. Practise more on placd.
A buffer outputs 100 MHz at 60% duty cycle when fed 100 MHz at 50%. What is the output duty cycle for a 50 MHz, 50% input, if delays do not change with frequency?
At 100 MHz the period is 10 ns and the high time grows from 5 ns to 6 ns, so the buffer stretches the high pulse by 1 ns (its rise and fall delays differ by 1 ns). At 50 MHz the period is 20 ns and the input high time is 10 ns, so the output high time is 11 ns: 11/20 = 55%.
Design a circuit that takes a serial bit stream (one bit per clock) and always outputs the remainder of the number so far divided by 7.
Assume bits arrive MSB first. If the remainder so far is r, appending bit b makes the number 2N + b, so the next remainder is r' = (2r + b) mod 7. That is a 7-state machine (remainders 0 to 6) in 3 flip-flops, starting at 0, and the state is the output. Example: r = 5, b = 1 gives 11 mod 7 = 4.
Using NOT, AND, OR, NAND and NOR gates, design a 1-bit comparator with the fewest gates.
Let N = NAND(A, B). Then A>B = AND(A, N) = A.B', A<B = AND(B, N) = A'.B, and A=B = NOR(A>B, A<B). That is 4 gates (1 NAND, 2 AND, 1 NOR) with no separate inverters.
You have 63 32-bit numbers: 31 values appear twice and one appears once. How do you find the one that appears once?
XOR all 63 numbers. Since x ^ x = 0, x ^ 0 = x and XOR is order-independent, every value that appears twice cancels and the result is the single value. It takes one pass and one 32-bit register; in hardware it is a 32-bit XOR accumulator.
Design a circuit that outputs the square of a number.
In general, use a multiplier with both inputs tied to x, or a ROM lookup table for small widths. For a 2-bit x = x1x0 the 4-bit square is y3 = x1.x0, y2 = x1.x0', y1 = 0, y0 = x0 (0, 1, 4, 9). The LSB of a square always equals the LSB of x, and bit 1 is always 0.
Design a Gray code counter with 20 states.
Use 5 bits (32 >= 20). Take the 5-bit reflected Gray sequence and keep the 20 codes at indices 6 to 25. Codes at indices i and 31 - i differ only in the MSB, so the wrap from 25 back to 6 is also a single-bit change. Build it as a binary counter running 6 to 25 feeding G = B ^ (B >> 1), with registered outputs.
About Analog Devices India hiring
How do I get into Analog Devices India as a fresher?
Mainly through campus drives for ECE and EE students. One reported drive shortlisted by CGPA, ran a two-hour written test with about 10 technical questions and 4 puzzles, then held two technical interviews; the internship led to a pre-placement offer. Most current India job postings on ADI's careers site ask for experience.
What is asked in the Analog Devices written test and interviews?
Circuits, FSMs, Verilog, static timing and DSP in the test, plus puzzles. Reported interview questions include a buffer duty-cycle problem, a divide-by-7 remainder FSM, a minimum-gate comparator, a 20-state Gray counter and finding the one non-repeated number among 63.
What is the Analog Devices fresher salary in India?
A 2021-batch ECE intern reported a ₹17 LPA pre-placement offer, and Levels.fyi lists about ₹19.5 lakh total compensation at P1 (Associate Hardware Engineer), its lowest India level. Both are self-reported; check the current offer through your placement cell.
Sources
- MNNIT Interview Hub - Analog Devices internship process
- Levels.fyi - Analog Devices hardware engineer salaries in India
- Analog Devices careers - job search
Checked on 25 Sep 2026. Recruitment rules change each cycle — confirm dates and eligibility in the official notification.