GATE Electronics & Communication preparation
ISRO, DRDO, BEL, ECIL and BSNL recruit from this paper.
Where GATE EC leads
- GATE EC → ISRO, DRDO, BEL, ECIL, BSNL, PSU E&T posts
- M.Tech VLSI, communications, signal processing
How placd prepares you
- Subject banks with explanations and an AI tutor on every question
- Year-wise pattern sets — timed, scored exactly as the paper scores
- A three-member selection-board mock interview, scored
GATE 2027 — schedule & eligibility
Source: gate2027.iitm.ac.in · verified 14 Sept 2026- Conducted by
- IIT Madras (organising institute for GATE 2027)
- Notification
- Not announced yet
- Applications open
- 2 Sept 2026
- Last date to apply
- 27 Sept 2026
- With late fee
- 5 Oct 2026
- Exam date
- 6 Feb 2027, 7 Feb 2027, 13 Feb 2027, 14 Feb 2027, 20 Feb 2027, 21 Feb 2027
- Result
- 19 Mar 2027
- Fee
- ₹2,000 per paper (₹2,500 in the extended window) (reserved categories ₹1,000 per paper for female, SC, ST and PwD candidates (₹1,500 extended))
- Degree
- Studying in the 3rd or a higher year of any undergraduate degree programme, or already holding a government-approved degree in Engineering, Technology, Architecture, Science, Commerce, Arts or Humanities
- Final year
- Can apply
- Age limit
- No age limit is stated
- Attempts
- No limit is stated
- Nationality
- Foreign nationals may appear at the full fee and must choose an exam city in India
- Also
- A candidate may take one paper or an allowed two-paper combination
How to apply
- Register on the GATE Online Application Processing System (GOAPS) linked from gate2027.iitm.ac.in
- Choose your paper, or an allowed two-paper combination, and three exam cities
- Upload the photograph, signature and any category or PwD certificate in the stated formats
- Pay the fee online; the extended window carries the late fee
- Use the application rectification window (14–21 Oct 2026) for corrections; city allotment is announced 4 Jan 2027
The Important Dates page lists revised opening and closing dates; the latest published values are shown here and the page itself says all dates are liable to change.
The subjects
ECE Core
Analog, digital, signals, comms, EM, devices
Network theory, analog & digital electronics, signals & systems, communication systems, electromagnetics & antennas, control, microprocessors, semiconductor devices, DSP, instrumentation and basic electrical — the campus technical round and GATE/ISRO/BEL interview spine.
Embedded Systems
Embedded C, MCUs, protocols, RTOS, Linux, PCB
Embedded C & firmware, ARM Cortex-M peripherals, UART/SPI/I2C/CAN protocols, FreeRTOS/Zephyr, embedded Linux & drivers, PCB design, power & signal integrity, JTAG debugging, AUTOSAR/ISO 26262, IoT & wireless, secure boot/OTA and MISRA/IEC 61508 — the Bosch/Continental/Tata Elxsi/LTTS interview layer.
Engineering Mathematics
The GATE common section, ~15% of every paper
Linear algebra, calculus, vector calculus, differential equations, complex variables, probability & statistics, numerical methods and transforms — the Engineering Mathematics section shared by every GATE paper and PSU written test, in all three GATE question types: MCQ, multiple-select (MSQ) and Numerical Answer Type, scored the way the paper scores them.
Aptitude
Clear the first filter
Quant, logical reasoning, and verbal with timed mock tests modelled on AMCAT, eLitmus, CoCubes and company aptitude rounds.
Past papers, year by year
Verified 15 Sept 2026 against the official sitePublished by IIT Guwahati as a public PDF. placd links to each year’s official paper and describes it — pattern, weightage, cutoffs — and never reproduces its text. The practise column is placd’s own set for that year: original questions assembled to the year’s distribution, scored the way the paper scores.
| Year | Paper | Official | Cutoff (Gen) | Practise |
|---|---|---|---|---|
| 2026 | 65 Qs · 100 marks · 180 min · MCQ · MSQ · NAT | Official PDF | 26.4 | 2026 pattern set · Pro |
| 2025 | 65 Qs · 100 marks · 180 min · MCQ · MSQ · NAT | Official PDF | 25 | 2025 pattern set · Pro |
| 2024 | 65 Qs · 100 marks · 180 min · MCQ · MSQ · NAT | Official PDF | 25 | 2024 pattern set · Pro |
| 2023 | 65 Qs · 100 marks · 180 min · MCQ · MSQ · NAT | Official PDF | 29.9 | 2023 pattern set · Pro |
| 2022 | 65 Qs · 100 marks · 180 min · MCQ · MSQ · NAT | Official PDF | 25 | 2022 pattern set · Pro |
| 2021 | 65 Qs · 100 marks · 180 min · MCQ · MSQ · NAT | Official PDF | 25 | 2021 pattern set · Pro |
| 2020 | 65 Qs · 100 marks · 180 min · MCQ · NAT | Official PDF | 28.8 | 2020 pattern set · Pro |
| 2019 | 65 Qs · 100 marks · 180 min · MCQ · NAT | Official PDF | 26.7 | 2019 pattern set · Pro |
What a GATE EC pattern set looks like
GATE EC 2026 pattern set: 65 questions · 100 marks · 180 minutes — an original set written to the paper’s distribution, scored the way the paper scores. The sample is free for every placd account; the year sets are part of Pro.
- General Aptitude10 questions · 15 marks
- Engineering Mathematics9 questions · 13 marks
- ECE Core23 questions · 36 marks
- Embedded Systems23 questions · 36 marks
A can finish a job in 12 days and B in 12 days. Working together, in how many days will they finish it?
- •5 days
- •7 days
- •6 days
- •8 days
Which term means: "sum of the products of branch voltages and branch currents over all branches is zero for any network satisfying Kirchhoff's laws, whatever the element types"?
- •Reciprocity theorem
- •Tellegen's theorem
- •Kirchhoff's current law
- •Thevenin's theorem
Which statement is correct?
- •Superposition theorem — any linear two-terminal network is replaceable by one voltage source in series with the resistance seen with all sources deactivated
- •Superposition theorem — response in a linear circuit with several independent sources equals the sum of responses with each source acting alone and the others replaced by their internal impedances
- •Superposition theorem — in a linear passive bilateral network the ratio of response to excitation is unchanged when the positions of source and measuring point are interchanged
- •Superposition theorem — a resistive load draws the most power when it equals the source resistance, at which point efficiency is only 50%
Frequently asked
- What does placd cover for GATE EC?
- ECE Core, Embedded Systems, Engineering Mathematics, Aptitude — the paper's sections, as practice banks with explanations and an AI tutor, plus a selection-board mock interview.
- Are GATE EC practice papers the real previous-year papers?
- No. placd's year-wise sets are original pattern sets authored to each year's real distribution — section split, question types, mark weighting and duration — with our own detailed solutions. Past-paper text is not reproduced.
- Where can I find GATE EC previous-year question papers?
- The year-by-year table above links each year's official paper where the conducting body publishes one (it does, as public PDFs), with the year's pattern, weightage and cutoff. placd never reproduces past-paper text.
- Where do I apply for GATE EC?
- Only on the conducting body's official site — placd links to it in the schedule section above and never hosts an application form. The dates and eligibility shown are read from that site and carry the date they were verified.
- How is a GATE EC practice set scored?
- As the exam scores it: negative marking of one-third of the marks for a wrong objective answer, no negative marking on MSQ or NAT.