27 real Semiconductor Devices questions from the ECE Core bank, as asked in Indian campus drives and tech interviews. Every question has a verified answer and an AI-tutor explanation on placd — free to start.
1. What is Intrinsic semiconductor?
Junior
A.undoped crystal with equal electron and hole concentrations, about 1.5×10^10 per cm³ for silicon at 300 K, and a Fermi level near mid-gap
B.zone on either side of a PN junction emptied of mobile carriers and containing fixed ionised dopants, narrowing under forward bias and widening under reverse bias
C.patterning step exposing photoresist through a mask, with minimum feature size k1·λ/NA, pushed to 13.5 nm EUV for leading-edge nodes
D.junction barrier (kT/q)·ln(NA·ND/ni²), about 0.6–0.7 V for silicon, which cannot be measured with an external voltmeter because contact potentials cancel it
2. Which term means: "undoped crystal with equal electron and hole concentrations, about 1.5×10^10 per cm³ for silicon at 300 K, and a Fermi level near mid-gap"?
A.Intrinsic semiconductor — undoped crystal with equal electron and hole concentrations, about 1.5×10^10 per cm³ for silicon at 300 K, and a Fermi level near mid-gap
B.Intrinsic semiconductor — separation between valence and conduction bands, 1.12 eV for silicon, 0.67 eV for germanium and 1.42 eV for GaAs at room temperature
C.Intrinsic semiconductor — tunnelling in heavily doped junctions below about 5 V with negative temperature coefficient, versus impact ionisation above about 6 V with positive coefficient
D.Intrinsic semiconductor — zone on either side of a PN junction emptied of mobile carriers and containing fixed ionised dopants, narrowing under forward bias and widening under reverse bias
A.drift is carrier motion under an electric field, diffusion is motion from high to low concentration; both are linked through the Einstein relation D/μ = kT/q
B.doping by accelerating ions into the wafer, giving precise dose and depth control at low temperature but requiring an anneal to repair lattice damage, unlike isotropic thermal diffusion
C.gate voltage at which strong inversion begins with surface potential about 2φF, set by oxide thickness, substrate doping and flat-band voltage
D.separation between valence and conduction bands, 1.12 eV for silicon, 0.67 eV for germanium and 1.42 eV for GaAs at room temperature
5. Which term means: "separation between valence and conduction bands, 1.12 eV for silicon, 0.67 eV for germanium and 1.42 eV for GaAs at room temperature"?
A.Energy band gap — zone on either side of a PN junction emptied of mobile carriers and containing fixed ionised dopants, narrowing under forward bias and widening under reverse bias
B.Energy band gap — drift is carrier motion under an electric field, diffusion is motion from high to low concentration; both are linked through the Einstein relation D/μ = kT/q
C.Energy band gap — tunnelling in heavily doped junctions below about 5 V with negative temperature coefficient, versus impact ionisation above about 6 V with positive coefficient
D.Energy band gap — separation between valence and conduction bands, 1.12 eV for silicon, 0.67 eV for germanium and 1.42 eV for GaAs at room temperature
A.gate voltage at which strong inversion begins with surface potential about 2φF, set by oxide thickness, substrate doping and flat-band voltage
B.undoped crystal with equal electron and hole concentrations, about 1.5×10^10 per cm³ for silicon at 300 K, and a Fermi level near mid-gap
C.patterning step exposing photoresist through a mask, with minimum feature size k1·λ/NA, pushed to 13.5 nm EUV for leading-edge nodes
D.zone on either side of a PN junction emptied of mobile carriers and containing fixed ionised dopants, narrowing under forward bias and widening under reverse bias
8. Which term means: "zone on either side of a PN junction emptied of mobile carriers and containing fixed ionised dopants, narrowing under forward bias and widening under reverse bias"?
A.Depletion region — patterning step exposing photoresist through a mask, with minimum feature size k1·λ/NA, pushed to 13.5 nm EUV for leading-edge nodes
B.Depletion region — junction barrier (kT/q)·ln(NA·ND/ni²), about 0.6–0.7 V for silicon, which cannot be measured with an external voltmeter because contact potentials cancel it
C.Depletion region — tunnelling in heavily doped junctions below about 5 V with negative temperature coefficient, versus impact ionisation above about 6 V with positive coefficient
D.Depletion region — zone on either side of a PN junction emptied of mobile carriers and containing fixed ionised dopants, narrowing under forward bias and widening under reverse bias
A.gate voltage at which strong inversion begins with surface potential about 2φF, set by oxide thickness, substrate doping and flat-band voltage
B.patterning step exposing photoresist through a mask, with minimum feature size k1·λ/NA, pushed to 13.5 nm EUV for leading-edge nodes
C.junction barrier (kT/q)·ln(NA·ND/ni²), about 0.6–0.7 V for silicon, which cannot be measured with an external voltmeter because contact potentials cancel it
D.drift is carrier motion under an electric field, diffusion is motion from high to low concentration; both are linked through the Einstein relation D/μ = kT/q
11. Which term means: "drift is carrier motion under an electric field, diffusion is motion from high to low concentration; both are linked through the Einstein relation D/μ = kT/q"?
A.Drift and diffusion currents — gate voltage at which strong inversion begins with surface potential about 2φF, set by oxide thickness, substrate doping and flat-band voltage
B.Drift and diffusion currents — tunnelling in heavily doped junctions below about 5 V with negative temperature coefficient, versus impact ionisation above about 6 V with positive coefficient
C.Drift and diffusion currents — zone on either side of a PN junction emptied of mobile carriers and containing fixed ionised dopants, narrowing under forward bias and widening under reverse bias
D.Drift and diffusion currents — drift is carrier motion under an electric field, diffusion is motion from high to low concentration; both are linked through the Einstein relation D/μ = kT/q
A.tunnelling in heavily doped junctions below about 5 V with negative temperature coefficient, versus impact ionisation above about 6 V with positive coefficient
B.separation between valence and conduction bands, 1.12 eV for silicon, 0.67 eV for germanium and 1.42 eV for GaAs at room temperature
C.drift is carrier motion under an electric field, diffusion is motion from high to low concentration; both are linked through the Einstein relation D/μ = kT/q
D.junction barrier (kT/q)·ln(NA·ND/ni²), about 0.6–0.7 V for silicon, which cannot be measured with an external voltmeter because contact potentials cancel it
14. Which term means: "junction barrier (kT/q)·ln(NA·ND/ni²), about 0.6–0.7 V for silicon, which cannot be measured with an external voltmeter because contact potentials cancel it"?
A.Built-in potential — junction barrier (kT/q)·ln(NA·ND/ni²), about 0.6–0.7 V for silicon, which cannot be measured with an external voltmeter because contact potentials cancel it
B.Built-in potential — gate voltage at which strong inversion begins with surface potential about 2φF, set by oxide thickness, substrate doping and flat-band voltage
C.Built-in potential — separation between valence and conduction bands, 1.12 eV for silicon, 0.67 eV for germanium and 1.42 eV for GaAs at room temperature
D.Built-in potential — patterning step exposing photoresist through a mask, with minimum feature size k1·λ/NA, pushed to 13.5 nm EUV for leading-edge nodes
A.zone on either side of a PN junction emptied of mobile carriers and containing fixed ionised dopants, narrowing under forward bias and widening under reverse bias
B.drift is carrier motion under an electric field, diffusion is motion from high to low concentration; both are linked through the Einstein relation D/μ = kT/q
C.gate voltage at which strong inversion begins with surface potential about 2φF, set by oxide thickness, substrate doping and flat-band voltage
D.separation between valence and conduction bands, 1.12 eV for silicon, 0.67 eV for germanium and 1.42 eV for GaAs at room temperature
17. Which term means: "gate voltage at which strong inversion begins with surface potential about 2φF, set by oxide thickness, substrate doping and flat-band voltage"?
A.MOSFET threshold voltage — doping by accelerating ions into the wafer, giving precise dose and depth control at low temperature but requiring an anneal to repair lattice damage, unlike isotropic thermal diffusion
B.MOSFET threshold voltage — undoped crystal with equal electron and hole concentrations, about 1.5×10^10 per cm³ for silicon at 300 K, and a Fermi level near mid-gap
C.MOSFET threshold voltage — gate voltage at which strong inversion begins with surface potential about 2φF, set by oxide thickness, substrate doping and flat-band voltage
D.MOSFET threshold voltage — drift is carrier motion under an electric field, diffusion is motion from high to low concentration; both are linked through the Einstein relation D/μ = kT/q
A.drift is carrier motion under an electric field, diffusion is motion from high to low concentration; both are linked through the Einstein relation D/μ = kT/q
B.separation between valence and conduction bands, 1.12 eV for silicon, 0.67 eV for germanium and 1.42 eV for GaAs at room temperature
C.gate voltage at which strong inversion begins with surface potential about 2φF, set by oxide thickness, substrate doping and flat-band voltage
D.tunnelling in heavily doped junctions below about 5 V with negative temperature coefficient, versus impact ionisation above about 6 V with positive coefficient
20. Which term means: "tunnelling in heavily doped junctions below about 5 V with negative temperature coefficient, versus impact ionisation above about 6 V with positive coefficient"?
A.Zener versus avalanche breakdown — drift is carrier motion under an electric field, diffusion is motion from high to low concentration; both are linked through the Einstein relation D/μ = kT/q
B.Zener versus avalanche breakdown — patterning step exposing photoresist through a mask, with minimum feature size k1·λ/NA, pushed to 13.5 nm EUV for leading-edge nodes
C.Zener versus avalanche breakdown — doping by accelerating ions into the wafer, giving precise dose and depth control at low temperature but requiring an anneal to repair lattice damage, unlike isotropic thermal diffusion
D.Zener versus avalanche breakdown — tunnelling in heavily doped junctions below about 5 V with negative temperature coefficient, versus impact ionisation above about 6 V with positive coefficient
A.zone on either side of a PN junction emptied of mobile carriers and containing fixed ionised dopants, narrowing under forward bias and widening under reverse bias
B.patterning step exposing photoresist through a mask, with minimum feature size k1·λ/NA, pushed to 13.5 nm EUV for leading-edge nodes
C.tunnelling in heavily doped junctions below about 5 V with negative temperature coefficient, versus impact ionisation above about 6 V with positive coefficient
D.junction barrier (kT/q)·ln(NA·ND/ni²), about 0.6–0.7 V for silicon, which cannot be measured with an external voltmeter because contact potentials cancel it
23. Which term means: "patterning step exposing photoresist through a mask, with minimum feature size k1·λ/NA, pushed to 13.5 nm EUV for leading-edge nodes"?
A.Photolithography — junction barrier (kT/q)·ln(NA·ND/ni²), about 0.6–0.7 V for silicon, which cannot be measured with an external voltmeter because contact potentials cancel it
B.Photolithography — patterning step exposing photoresist through a mask, with minimum feature size k1·λ/NA, pushed to 13.5 nm EUV for leading-edge nodes
C.Photolithography — zone on either side of a PN junction emptied of mobile carriers and containing fixed ionised dopants, narrowing under forward bias and widening under reverse bias
D.Photolithography — doping by accelerating ions into the wafer, giving precise dose and depth control at low temperature but requiring an anneal to repair lattice damage, unlike isotropic thermal diffusion
A.doping by accelerating ions into the wafer, giving precise dose and depth control at low temperature but requiring an anneal to repair lattice damage, unlike isotropic thermal diffusion
B.separation between valence and conduction bands, 1.12 eV for silicon, 0.67 eV for germanium and 1.42 eV for GaAs at room temperature
C.drift is carrier motion under an electric field, diffusion is motion from high to low concentration; both are linked through the Einstein relation D/μ = kT/q
D.patterning step exposing photoresist through a mask, with minimum feature size k1·λ/NA, pushed to 13.5 nm EUV for leading-edge nodes
26. Which term means: "doping by accelerating ions into the wafer, giving precise dose and depth control at low temperature but requiring an anneal to repair lattice damage, unlike isotropic thermal diffusion"?
A.Ion implantation — tunnelling in heavily doped junctions below about 5 V with negative temperature coefficient, versus impact ionisation above about 6 V with positive coefficient
B.Ion implantation — separation between valence and conduction bands, 1.12 eV for silicon, 0.67 eV for germanium and 1.42 eV for GaAs at room temperature
C.Ion implantation — patterning step exposing photoresist through a mask, with minimum feature size k1·λ/NA, pushed to 13.5 nm EUV for leading-edge nodes
D.Ion implantation — doping by accelerating ions into the wafer, giving precise dose and depth control at low temperature but requiring an anneal to repair lattice damage, unlike isotropic thermal diffusion
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